Eeprom circuit voltage reference circuit and method for providing a low temperature-coefficient voltage reference

ABSTRACT

A voltage reference circuit ( 40 ) is provided for producing a low temerature-coefficient analogue trim value. A pair of EEPROMs ( 50  and  60 ) are arranged such that the trim value is the difference between two EEPROM transistor threshold voltages. The substantially temperature dependent components of threshold voltage cancel out leaving only the substantially temperature independent trim value. Therefor the temperature coefficient of the voltage reference circuit ( 40 ) is negligible.

FIELD OF THE INVENTION

[0001] This invention relates to voltage reference circuits andparticularly though not exclusively to analogue trim values inintegrated circuits.

BACKGROUND OF THE INVENTION

[0002] In the field of this invention it is known in integrated circuitsto produce an analogue trim value that is used to trim a referencevoltage produced by the integrated circuit. It is highly desirable thatthis trim value is substantially independent of temperature variations,especially in automotive applications where large temperature ranges arespecified.

[0003] It is known to provide analogue trim values using fuses, zenerzaps and EEPROMs to provide digital trim information to trim a voltage.It is also known to use EEPROMs and resistors together to store analoguetrim information. However, a problem with these arrangements is thatalthough a voltage may be trimmed precisely at a given temperature, thenature of analogue signals means that this precision is not wellmaintained over a range of temperatures. For an integrated circuit usedin an automotive application, the operable temperature range maytypically be −40° C. to 125° C.

[0004] What is needed is an arrangement in which an analogue trim valueis provided which is substantially temperature independent over such atemperature range. In other words, the trim value must have a negligibletemperature coefficient.

[0005] It is an object of the present invention to provide an EEPROMcircuit, a voltage reference circuit and a method for producing a lowtemperature-coefficient voltage reference wherein the abovementioneddisadvantages may be alleviated.

SUMMARY OF THE INVENTION

[0006] In accordance with a first aspect of the present invention thereis provided an EEPROM circuit for providing a lowtemperature-coefficient voltage, comprising first and second EEPROMcells having first and second transistor threshold voltages and firstand second control electrodes respectively, the first and second controlelectrodes being coupled together wherein the first threshold voltage isprogrammable independently of the second threshold voltage, such thatthe low temperature-coefficient voltage is provided as a voltagedifferential between the first and the second threshold voltages.

[0007] In accordance with a second aspect of the present invention thereis provided a voltage reference circuit comprising: the EEPROM circuitin accordance with the first aspect of the invention;

[0008] a bandgap reference circuirt (90); and

[0009] a current mirror (80) coupled between the EEPROM circuit (45) andthe bandgap reference circuit (90), for transferring a scaled voltagevalue to the bandgap reference circuit (9),

[0010] Wherein the scaled voltage value is a scaled proportion of thelow temerature-coefficient voltage.

[0011] In accordance with a third aspect of the present invention thereis provided a method for providing a low temperature-coefficientvoltage, the method comprising the steps of:

[0012] programming a threshold voltage of a control electrode of a firstEEPROM cell at a first voltage level: and, programming a thresholdvoltage of a control electrode of a second EEPROM cell at a secondvoltage level, the control electrode of the second EEPROM cell beingcoupled to the control electrode of the first EEPROM cell

[0013] Wherein the low temperature-coefficient voltage is provided as avoltage differential between the first and the second thresholdvoltages.

[0014] The first threshold voltage is preferably programmedindependently of the second threshold voltage via a switch arrangementcoupled between the first and second control electrodes of the first andsecond EEPROM cells respectively.

[0015] Preferably the step of programming the threshold voltage of thecontrol electrode of the second EEPROM cell includes the step ofswitching a switch arrangement coupled between the control electrodes ofthe first and second EEPROM cells. The low temperature-coefficientvoltage is preferably an analogue trim value for trimming a referencevoltage.

[0016] In this way low temperature-coefficient analogue trim values areprovided, which are particularly beneficial when used to trim voltagevalues in automotive applications where an integrated circuit may havean operational temperature range of typically −40° C. to 125° C.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One circuit and method for producing a lowtemperature-coefficient analogue trim value incorporating the presentinvention will now be described, by way of example only, with referenceto the accompanying drawings, in which:

[0018]FIG. 1 shows an illustrative circuit diagram of an EEPROM circuithaving two EEPROM cells arranged to provide an analogue trim voltage inaccordance with the present invention; and

[0019]FIG. 2 shows a circuit diagram of a voltage reference circuitaccording to the present invention, using the arrangement of FIG. 1.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0020] Referring to FIG. 1, there is shown an illustrative circuitdiagram showing an arrangement 5, including first and second EEPROMcells 10 and 20 respectively and a resistor 30. The first EEPROM cell 10has a threshold voltage VT10 and the second EEPROM cell has a thresholdvoltage VT20.

[0021] The resistor 30 develops a trim voltage VR which is thedifference between the threshold voltages VT10 and VT20 of two EEPROMcells 10 and 20 respectively.

[0022] Referring now also to FIG. 2, there is shown a practicalimplementation 40 of the arrangement 5, in which the difference inthreshold voltages between two EEPROM cells is used to trim the voltageof a band-gap reference.

[0023] Implementation 40 includes an EEPROM arrangement 45, a currentsource 70, a current mirror 80, and a bandgap reference circuit 90.

[0024] The EEPROM arrangement 45 has first and second EEPROM cells 50and 60 respectively, coupled in a similar fashion to that of thearrangement 5. Each of the EEPROM cells 50 and 60 respectively hassource, gate and drain electrodes. A switch 55 is coupled between thegate electrodes of the EEPROM cells 50 and 60 respectively, and theswitch is also coupled to a programming voltage Vp to be furtherdescribed below. The source electrode of the first EEPROM cell 50 iscoupled to ground via a resistor 65 which is arranged to develop avoltage VEE to be further described below. The source electrode of thesecond EEPROM cell 60 is coupled directly to ground.

[0025] The current source 70 is coupled between a power supply voltageVcc and the drain electrode of the second EEPROM cell 60. The currentmirror comprises first and second transistors 82 and 87 respectively,which each have source, gate and drain electrodes. The source electrodesof the first and second transistors 82 and 87 respectively are coupledto the power supply voltage Vcc. The drain electrode of the secondtransistor 87 is coupled to the drain electrode of the first EEPROM cell50 of the arrangement 45, and also to the gate electrodes of both thefirst and second transistors 82 and 87 respectively. The drain electrodeof the first transistor 82 is coupled to the bandgap reference circuitin a manner to be further described below.

[0026] The bandgap reference circuit 90 comprises a differentialamplifier 95, a bipolar transistor 96, first and second resistors 92 and97 and a bandgap voltage source 93. The differential amplifier 95 has anon-inverting input coupled to the voltage source 93, an inverting inputcoupled to ground via the first resistor 92 and coupled to the drainelectrode of the first transistor 82 of the current mirror 80 and anoutput.

[0027] The bipolar transistor 96 has a base electrode coupled to theoutput of the differential amplifier 95, a collector electrode coupledto the power supply voltage Vcc and an emitter electrode coupled to theinverting input of the differential amplifier 95 via the second resistor97, and to a reference voltage node 98, arranged to provide a referencevoltage VREF.

[0028] In operation the voltage VEE across resistor 65 is the differencebetween the thresholds of the first and second EEPROM cells 50 and 60respectively. The threshold of the second EEPROM cell 60 may be adjustedby programming using the programming voltage VP when the switch 55 isopen. In this way the first EEPROM cell 50 remains unprogrammed. Duringnormal operation of the circuit 40 the switch 55 is closed.

[0029] In the circuit 40 of FIG. 2, the output reference voltage VREF isgiven by: $\begin{matrix}{V_{REF} = {{V_{BG} \cdot \frac{R_{1} + R_{2}}{R_{1}}} - {V_{EE} \cdot \frac{R_{2}}{R_{3}}}}} & {{Equation}\quad 1}\end{matrix}$

[0030] The voltage VEE is scaled by resistors 97 and 65 and subtractedfrom a bandgap voltage VBG of the band-gap voltage source 93 (which inthis example is 1.2V). The band-gap voltage VBG has a low temperaturecoefficient (TC), but the Integrated Circuit fabrication process causesabout 3.5% variation in VBG at 1 standard deviation.

[0031] VEE is linearly adjustable and has a low TC. The circuit 40therefore has the advantages that VEE is scaled down and thereforevariation in VEE is also scaled down. Furthermore, in the case of EEPROMfailure VREF returns to its untrimmed value.

[0032] Most of the temperature sensitive parameters affecting thethreshold voltage of a transistor are due to the silicon substratecharacteristics and not the gate oxide or polysilicon gatecharacteristics. When an EEPROM is programmed, charge is stored on thegate of the EEPROM. Regardless of whether an EEPROM is programmed or notthe silicon characteristics remain unchanged (unless many cycles ofprogram and erase are performed). Therefore the EEPROM thresholdtemperature dependency is controlled by the silicon parameters and thesesilicon parameters can be subtracted out leaving only the stored chargecomponent.

[0033] The TC of an EEPROM cell threshold voltage is substantiallyindependent of charge stored. In other words the TC of the EEPROMthreshold remains almost exactly the same regardless of the amount ofcharge stored on an EEPROM gate. The mean change in TC between erasedand programmed states of a typical EEPROM is only 0.14 mV/C.

[0034] EEPROM cells will normally lose some of their stored chargeduring their lifetime so the trim value can be expected to vary slightlyover time. VEE is scaled down by resistors R2 and R3, so that anyvariation in VEE will also be scaled down. Temperature acceleratescharge loss. Over its life, the under-bonnet area of an automobile willspend typically 500 hours at 150° C. and the rest of the time below 110°C. Since charge loss is highly temperature dependent the time spent atless than 110° C. can be neglected.

[0035] Though the reference circuit itself has a non-negligible TC, theanalogue trim circuit adds almost no temperature dependence to VREF. Inthe above embodiment the analogue trim circuit only changes thetemperature dependence by 0.05 mV/C.

[0036] It will be understood that the circuit and method for producing alow temperature-coefficient analogue trim described above provides thefollowing advantages:

[0037] At least one fundamental difference between the present inventionand a prior art arrangements in which EEPROM cells are used to storetrim values is that the trim value of the present invention is stored asthe difference between two EEPROM thresholds rather than as the value ofa single programmed EEPROM cell.

[0038] Therefore one advantage of the present invention for trimmingvoltage references is that the TC of the trim value is negligible. Otherknown solutions using digital trim to selectively switch resistors havea high TC because the TC of resistors is high. Solutions for analoguetrim using single EEPROM cells have much higher TCs because the EEPROMthreshold has a large TC.

[0039] An additional advantage is that the circuit 40 is much smallerthan other arrangements such as a digital trim arrangement using EEPROMcells. Trimming using an array of EEPROM cells requires a largersemiconductor area and involves high power consumption, high voltageswitching circuitry.

[0040] It will be appreciated that embodiments other than thosementioned above are possible. For example, the exact arrangements of thebandgap reference circuit and the current mirror may differ from thosedescribed above.

1. An EEPROM circuit (45) for providing a low temperature-coefficientvoltage, comprising first (50) and second (60) EEPROM cells having firstand second transistor threshold voltages and first and second controlelectrodes respectively, the first and second control electrodes beingcoupled together, wherein the first threshold voltage is programmableindependently of the second threshold voltage, such that the lowtemperature-coefficient voltage is provided as a voltage differentialbetween the first and the second threshold voltages.
 2. The EEPROMcircuit (45) of claim 1 wherein the first threshold voltage isprogrammed independently of the second threshold voltage via a switcharrangement (55) coupled between the first and second control electrodesof the first (50) and second (60) EEPROM cells respectively.
 3. Avoltage reference circuit (40) comprising: the EEPROM circuit (45) ofclaim 1 or claim 2; a bandgap reference circuit (90); and a currentmirror (80) coupled between the EEPROM circuit (45) and the bandgapreference circuit (90), for transferring a scaled voltage value to thebandgap reference circuit (90), wherein the scaled voltage value is ascaled proportion of the low temperature-coefficient voltage.
 4. Amethod for providing a low temperature-coefficient voltage, the methodcomprising the steps of: programming a threshold voltage of a controlelectrode of a first EEPROM cell (50) at a first voltage level; and,programming a threshold voltage of a control electrode of a secondEEPROM cell (60) at a second voltage level, the control electrode of thesecond EEPROM cell (60) being coupled to the control electrode of thefirst EEPROM cell (50); wherein the low temperature-coefficient voltageis provided as a voltage differential between the first and, the secondthreshold voltages.
 5. The method of claim 4 wherein the step ofprogramming the threshold voltage of the control electrode of the secondEEPROM cell (60) includes the step of switching a switch arrangement(55) coupled between the control electrodes of the first (50) and second(60) EEPROM cells.
 6. The circuit of claim 1 wherein the lowtemperature-coefficient voltage is an analogue trim value for trimming areference voltage.
 7. The method of claim 4 wherein the lowtemperature-coefficient voltage is an analogue trim value for trimming areference voltage.